UC   |   UC Berkeley   |   UC Berkeley Extension

You are not logged in  Login      

 

 

Home  \  Courses  \

X141: Advanced Design Techniques for Analog ICs

 



Registration is fast and easy!

 
Type of Credit Academic Credit
Campus Department EECS
Level Upper Division
Number of Units 2
Level of Difficulty Level 4 (Advanced)
Instructor Dr. Vincent Chang
Dr. Han-Bin Lin
Number of Lectures 20
Course Length 30 hours

Course Fee

US$ 399.00
 
International Currency Exchange Converter
   
Course Description
Advances in signal processing, analog/digital conversion, power management, and continuingly scaling down of CMOS nanotechnology have ushered in the era of analog IC design with multi-standard challenges in the 21st century. This state-of-the-art course includes stability of feedback, frequency compensation, multistage OPAMPs, and CMOS OPAMP designs with the industry-strength tool—HSPICE. You are required to work on a research project which scope covers the design of an advanced CMOS OPAMP, a compact low-voltage low-power OPAMP, and high-performance CMOS comparators for flash ADC applications.

 

Free Course Preview
Lecture Topic Soundtrack # of Slides

 

Class Presentation
Lecture Topic # of Slides
Course Overview_X141  50 
Stability of Feedback: Basic Concepts  66 
Stability Study of a Noninverting Amplifier  48 
Root Locus: Effect of Pole Locations on Stability  78 
Frequency Compensation: Basic Concepts  40 
Frequency Compensation: Implementation Techniques  43 
Miller Compensation & Pole-Splitting  58 
The Multistage OPAMP: Identification of Parts and Functions  70 
DC Analysis of Bias Circuitry  30 
10  DC Analysis of Input and Gain Stages  50 
11  DC Analysis of Class AB Output Stage  40 
12  Frequency Response: Hand Analysis vs. Simulation  61 
13  Slew-Rate: Hand Analysis vs. Simulation  49 
14  Two-Stage CMOS OPAMP: General Considerations  81 
15  Two-Stage CMOS OPAMP: Frequency Compensation   50 
16  Design of OPAMP Using HSPICE: Part I  50 
17  Cascode CMOS OPAMP   47 
18  Design of OPAMP Using HSPICE: Part II  102 
19  Design of OPAMP Using HSPICE: Part III  80 
20  Folded-Cascode CMOS OPAMP  67 
21  Design of OPAMP Using HSPICE: Part IV  80 
22  Design of OPAMP Using HSPICE: Part V  80 

 

*Number of slides are estimated

 

Additional Course Information
Who Should Attend

Many types of working professionals find this course both practical and challenging:

• Majored in EE but need to brush up on their knowledge in this area for advancing their careers.
• Wish to enter the semiconductor market and are looking to acquire advanced knowledge in this area.

Course Syllabus

Course Prerequisite

You should either have taken the prerequisites offered by UC Berkeley Extension:

"X139: Advanced Analog Microelectronics"
"X140: Fundamentals of Analog Integrated-Circuit Design Techniques"

or possess working-level knowledge on fundamental analog ICs, such as feedback, current mirrors, differential amplifiers, single-stage amplifiers, frequency response, and class AB output stages, etc.

Grade Structure

Your grade consists of the following elements:

• Class Participation & Discussion: 20%
• Homework Assignments: 10%
• Individual Research Project: 25%
• Midterm Exam: 20%
• Proctored Final Exam: 25%

Research Project Options

As a registered participant, you will be expected to leverage what they learn from this course to conduct an individual research project which scope covers some real-world issues with the following research options:

• Design of low-voltage & low-power OPAMP

Recommended source: Ron Hogervorst et. al., “A Compact Power-Efficient 3 V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries,” IEEE Journal of Solid-State Circuits, VOL. 29, NO. 12. Dec. 1994.

1. Rail-to-rail input stage with gm control & rail-to-rail output stage with class AB control
2. Cascade Miller compensation

• Design of advanced CMOS OPAMP

1. Current mirror OPAMP
2. OPAMP design with common-mode feedback (CMFB) circuits

• High-performance CMOS comparator for the flash ADC application

1. Updated techniques for minimizing errors due to the charge injection effect
2. Comparator design with techniques to eliminate clock-feedthrough errors and input offset voltage.

You should access detailed information in the Classrooms after you register this course.

 

Search Courses
Integrated-Circuit Design and Techniques
  •  Required Courses
  •  Electives
 


Copyright © Regents of the University of California & Knowledge Master, Inc. 2010 All rights reserved  -  Powered by Knowledge Master, Inc.